The introduction of copper (Cu) metal into multilayer metallization schemes for manufacturing integrated circuits can necessitate the use of diffusion barriers/liners to promote adhesion and growth of the Cu layers and to prevent diffusion of Cu into the dielectric materials. Barriers/liners that are deposited onto dielectric materials can include refractive materials, such as tungsten (W), molybdenum (Mo), and tantalum (Ta), that are non-reactive and immiscible in Cu, and can offer low electrical resistivity. Current integration schemes that integrate Cu metallization and dielectric materials can require that barrier/liner deposition processes be conducted at low temperatures, for example below about 300° C. When integrating barrier/liners layers with temperature sensitive material layers, such as various low-dielectric constant (low-k) materials, even lower substrate temperatures may be required, for example substrate temperatures between about 100° C. and about 300° C.
For example, Cu integration schemes for technology nodes less than or equal to about 100 nm can utilize processing that includes patterning a low-k inter-level dielectric, physical vapor deposition (PVD) of a Ta or TaN/Ta barrier layer onto the patterned the low-k dielectric, PVD of a Cu seed layer onto the barrier layer, and electrochemical deposition (ECD) of Cu onto the Cu seed layer. Generally, Ta layers are chosen for their adhesion properties (i.e., their ability to adhere on low-k films), and Ta/TaN layers are generally chosen for their barrier properties (i.e., their ability to prevent Cu diffusion into the low-k film).
Significant efforts have been devoted to the study and implementation of thin transition metal layers as Cu diffusion barriers, including chromium, tantalum, molybdenum and tungsten that exhibit low miscibility in Cu. More recently, other metals, such as ruthenium (Ru) and rhodium (Rh), have been identified as potential barrier layers since they are expected to behave similarly to conventional refractory metals. In addition, it is possible that the use of Ru or Rh can permit the use of only one barrier layer, as opposed to two layers, such as Ta/TaN. For example, it is possible that one Ru layer can replace the Ta/TaN barrier layer. Moreover, current research is finding that the one Ru layer can possibly further replace the Cu seed layer, and bulk Cu deposition can proceed directly following deposition of a Ru barrier/seed layer.
Conventionally, Ru layers can be formed by thermally decomposing a ruthenium-containing precursor, such as a ruthenium carbonyl precursor or a ruthenium organometallic precursor, in a thermal chemical vapor deposition (TCVD) process. However, material properties of Ru layers that are deposited by TCVD can be poor, for example have high electrical resistivity, unless the substrate temperatures are sufficiently high, for example above about 300° C. In addition, the use of a ruthenium carbonyl precursor can lead to poor ruthenium deposition rates due to the low vapor pressure of the ruthenium carbonyl precursor and the transport issues associated therewith. Overall, the inventors have observed that current ruthenium deposition methods suffer from low deposition rates and require high deposition temperatures, thereby making the deposition of ruthenium layers impractical for many semiconductor device applications. In addition, control over the degree of crystallinity, including crystallographic orientation of the deposited ruthenium metal layers, can be required since the stress, the morphology, and electrical resistivity can be a function of the crystallographic orientation.